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tj49 15 0 1.5a very low input / output voltage ultra low dropout linear regulator july 2 01 1 ht c 1 htc korea features ? ultra low dropout voltage ? low quiescent current ? excellent line and load regulation ? guaranteed output current of 1.5a ? available in sop - 8 , sop - 8 - pp , to - 252- 5l packages ? adjustable output voltage down to 0.8v ? logic controlled shutdown option ? over - temperature/over - current protection ? - 40 c to 125 c junction temperature range application s ? motherboards and graphic card s ? microprocessor power supplies ? peripheral cards ? low voltage digital ics ? high efficiency linear regulators ? smps post regulators descripsion the TJ49150 is a series of 1.5a high performance ultra low dropout linear regulator ideal for powering core voltages of low - power microprocessors. the TJ49150 implements a dual supply configuration allowing for very low output impedance. the TJ49150 requires a bias input supply and a main input supply, allowing for very low input voltages on the main supply rail. the input supply operates from 1.4v to 5.5v an d the bias supply requires between 3v and 5.5 v for proper operation. the TJ49150 offers adjust able output voltages down to 0.8 v. the TJ49150 is developed on a cmos technology which allows low quiescent current opera tion independent of output current. this technology also allows the TJ49150 to operate under extremely low dropout conditions. sop - 8 / sop -8-pp t o252 -5l ordering information device package TJ49150 gd sop -8 TJ49150 gdp sop -8-pp TJ49150 grs to -252-5l
tj49 15 0 july 2 01 1 htc 2 absolute maximum ratings characteristic symbol min. max. unit input supply voltage (survival) v in -0.3 6 v bias supply voltage (survival) v bias -0.3 6 v enable input voltage (survival) v en -0.3 6 v output voltage (survival) v out -0.3 v in +0.3 v lead temperature (soldering, 5 sec) t sol 260 c storage temperature range t stg -65 150 c recommended operating r atings characteristic symbol min. max. unit input supply voltage v in 1.3 5.5 v bias supply voltage v bias 3 5.5 v enable input voltage v en 0 v bias v ambient temperature range t aopr -40 105 c operating junction temperature range t jopr -40 125 c thermal information thermal metric jc ja unit thermal resistance (sop - 8) * c/w thermal resistance (sop -8- pp) * 15 75 c/w thermal resistance (to -252- 5l) * 68 c/w * calculated from package in still air, mounted to minimum foot print(2.5mm x 3.0mm) pcb. o rdering information v out package order no. description marking compliance status adj sop -8 TJ49150 gd 1.5a , adjustable , enable TJ49150 g rohs, green contact us sop -8-pp TJ49150 gdp 1.5a , adjustable , enable TJ49150 g rohs, green active to -252 5l TJ49150 grs 1.5a , adjustable TJ49150 g rohs, green contact us
tj49 15 0 july 2 01 1 htc 3 pin configuration sop - 8 / sop - 8 - pp to - 252- 5l pin description pin no. pin name pin function sop -8 sop -8-pp to252 -5l 1 1 1 adj output adjust for adjustable output. 2 2 2 in power input. 8 8 3 gnd reference ground. 3 3 4 out power output. 4 4 5 bias input bias voltage for powering all circuitry on the regulator except the output power tr. 5 5 - en chip enable ( sop - 8/sop -8-pp only ) . 6, 7 6, 7 - nc no connection. - exposed pad tab thermal exposed pad / tab connect to g round. adj in out bias thermal exposed pad gnd nc nc en adj in gnd out bias tab
tj49 15 0 july 2 01 1 htc 4 block diagram bandgap reference enable over current protection thermal protection bias in adj gnd out grs gd / gdp en
tj49 15 0 july 2 01 1 htc 5 typical application * see application information for the details over external capacitor. * * TJ49150 can deliver a continuous current of 1.5a over the full operating temperature. however, the output current is limited by the restriction of power dissipation which differs from packages. a heat sink may be required depending on the maximum power dissipation and maximum ambient temperature of ap plication. with respect to the applied package, the maximum output current of 1.5a may be still undeliverable. *** for the details, s ee application information . c ff in bias out adj gnd v in v out c out v bias c vin c vbias in bias out en gnd adj r en v in v en v bias v out c out c vbias c vin in bias out en gnd adj r en v in v en v bias v out c out c vbias c vin r 1 r 2 in bias out en gnd adj r en v in v en v bias v out c out c vbias c vin r 1 r 2
tj49 15 0 july 2 01 1 htc 6 electrical characteristics limits in standard typeface are for tj=25 , and limits in boldface type apply over the full operating temperature range . unless otherwise specified: v bias = v o(no m. ) + 2.1 v, v in = v o(nom . ) + 1v, v en =v bias , i l = 10 ma. parameter symbol test condition min. t y p. max. unit adjustable pin voltage v adj v out +1 v < v in < 5.5 v 0.784 0. 776 0.8 0.816 0.82 4 v line regulation (note 1 ) v line v out +1 v < v in < 5.5 v 0.02 0.1 %/v load regulation (note 1 , 2 ) v load 10 ma < i l < 1.5 a 0.25 1. 0 % dropout voltage (note 2 ) v drop i l = 0.75 a 120 160 200 mv i l = 1.5 a 240 320 400 dropout voltage (note 2 ) v drop i l = 1.5 a , v bias = 5.0 v 200 270 340 m v dropout voltage (note 3 ) v drop i l = 1.5 a 1.5 2.1 v bias pin current i bias i l = 1.5 a 300 450 600 a ground pin current (note 4 ) i gnd1 i l = 10 ma 300 450 600 a ground pin current (note 4) i gnd2 v en < 0.2 v 0.1 0.5 1.0 a current limit i cl 2.5 a thermal shutdown temperature t sd 155 c thermal shutdown hysteresis t sd 30 c enable threshold (note 5 ) logic low v enl output = low 0.4 v logic high v enh output = high 2.0 v enable pin input current (note 5 ) i en v en = v bias 0.1 1.0 a adjust pin current i adj v adj = 0.8 v 0.1 1.0 a note 1. output voltage line regulation is defined as the change in output voltage from the nominal value due to change in the input line voltage. output voltage load regulation is defined as the change in output voltage from the nominal value due to change in load current. note 2. regulation is measured at constant junction temperature by using a 1 0ms current pulse. devices are tested for load regulation in the load range from 10ma to 1.5a . note 3. for v out 1.0v, the v bias dropout specification doe s not apply due that the minimum v bias input is 3.0v. note 4. i gnd = i bias + (i in C i out ). the total current drawn from the supply is the sum of the load current plus the ground current. note 5. sop - 8/sop -8- pp packages only.
tj49 15 0 july 2 01 1 htc 7 typical operating characteristics reference voltage vs. v in output voltage vs. v in dropout voltage (v in - v out ) vs. output current t.b.d. 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 0 1 2 3 4 5 output voltage [v] input voltage [v] 0 0.2 0.4 0.6 0.8 1 1.2 1.4 0 1 2 3 4 5 output voltage [v] input voltage [v] iout=0.1a iout=1.5a 0 50 100 150 200 250 300 350 400 0 0.5 1 1.5 dropout voltage [mv] output current [a] vbias = 3.3v vbias = 5.0v
tj49 15 0 july 2 01 1 htc 8 application information the TJ49150 is a high performance, low dropout linear regulator, designed for high current application that requires fast transient response. the TJ49150 operates from two input supply voltages, significantly reducing dropout volt age. the TJ49150 is designed so that a minimum of external component are necessary. bias supply voltage the TJ49150 contro l circuitry is supplied by the bias pin which requires a very low bias current even at the maximum output current level. a bypass capacitor on the bias pin is recommended to improve the performance of the TJ49150 during line and load transient. a small ceramic capacitor from bias pin to ground reduces high frequency noise that could be injected into the control circuitry from the bias rail. in practical applications, a 1 f capacitor and smaller valued capacitors such as 0.01 f or 0.001 f in parallel with that larger capacitor may be u sed to decouple the bias supply. the bias input voltage must be 2.1v above the output voltage, with a minimum bias input voltage of 3 .0v. adjustable regulator design the TJ49150 adjustable version allows fixing outp ut voltage anywhere between 0.8 v and 2.0 v using two external resistors as presented in the typical application circuit. the resistor values are given by; ? ? ? ? ? ? ? ? ? = 1 0.8 v r2 r1 out it is suggested to use r1 values lower than 10k? to obtain better load transient performances. even, higher values up to 100k? are suitable . enable the sop - 8 and sop8 - pp types of TJ49150 feature an active high enable input(en) that allows on/off control of the regulator. the enable function of TJ49150 has hysteresis characteristics . the enable input allows on control of the regulator with the enable pin voltage of 2.0v or above . when the enable input voltage lowers under 0.4v , the enable input allows off control of the regulator. if not in used for logic control, en pin must be tied to bias voltage for proper operation. when a pull - up resistor is connected between en pin and v en signal(or v bias line), the resistance should be kept under 10 k? . the en pin must not be left at high impedance. supply power sequencing in common applications where the power on transient of in and bias voltages are not particularly fast(tr>100 s), no power sequencing is required. where voltage transient input is very fast(tr<100 s), it is recommended to have the in voltage present before or, at le ast, at the same time as the bias voltage in order to avoid over voltage spikes during the power on transient. output capacitors the TJ49150 requires a minimum output capacitance to maintain stability. the TJ49150 is specifically designed to be stable with a ceramic chip, tantal um, and aluminum electrolytic capacitor. a 10 f of ceramic chip capacitor or a 33 f tantal um or aluminum electrolytic capacitor wou ld satisfy most applications. its minimum value of ceramic chip capacitor is 1 f and of tantalum or aluminum electrolytic capacitor is 22 f . they might be increased if output current is high. input capacitor an input capacitor of minimum 1 f of chip ceramic capacitor or 10 f of tantal um or aluminum electrolytic
tj49 15 0 july 2 01 1 htc 9 capacitor is recommended . larger values will help to improve ripple rejection by bypassing the input to the regulator, further improving the integrity of the output voltage. feed forward capacitor the TJ49150 requires a feed forward capacitor to stabilize output in case of complicated transient load condition . it also performs a soft - start(ss) function on the output voltage. a 10nf is recommended to support its stability support function and its higher value will increase the time of ss function . maximum output current capability the TJ49150 can deliver a continuous current of 1.5a over the full operating junction temperature range. however, the output current is limited by the restriction of power dissipation which differs from packages. a heat sink may be required depending on the maximum power dissipation and maximum ambient temperature of application. with respect to the applied package, the maximum output current of 1.5a may be still undeliverable due to the restriction of the power dissipation of TJ49150 . under all possible conditions, the junction temperature must be within the range specified under operating conditions. the temperatures over the device are given by : t c = t a + p d x ca / t j = t c + p d x jc / t j = t a + p d x ja w here t j is the junction temperature, t c is the case temperature, t a is the ambient temperature, p d is the total power dissipation of the device, ca is the thermal resistance of case - to - ambient, jc is the thermal resistance of junction - to - case, and ja is the thermal resistance of junction to ambient. the total power dissipation of the device is given by: p d = p in C p out = {(v in x i in ) + (v bias x i bias )} C (v out x i out ) the maximum allowable temperature rise (t rmax ) depends on the maximum ambient temperature (t amax ) of the application, and the maximum allowable junction temperature (t jmax ): t rma x = t jmax C t amax the maximum allowable value for junction - to - ambient thermal resistance, ja , can be calculated using the formula: ja = t rmax / p d = (t jmax C t amax ) / p d TJ49150 is available in sop - 8, sop - 8 - pp , and to - 252 - 5l packages. the thermal resistance depends on amount of copper area or heat sink, and on air flow. if proper cooling solution such as heat sink, copper plane area, air flow is applied, the maximum allowable power dissipation could be increased. however, if the ambient temperature is increased, the allowable power dissipation would be decreased. the ja could be decreased with respect to the copper plane area. so, the specification of maximum power dissipation for an application is fixed, the proper copp er plane area could be estimated by following graphs. w ider copper plane area leads lower ja . the maximum allowable power dissipation is also influenced by the ambient temperature. with the ja - copper
tj49 15 0 july 2 01 1 htc 10 plane area relationship, the maximum allowable pow er dissipation could be evaluated with respect to the ambient temperature. as shown in graph, the higher copper plane area leads ja . and the higher ambient temperature leads lower maximum allowable power dissipation. all this relationship is based on t he aforesaid equation ; ja = t rmax / p d = (t jmax C t amax ) / p d the graph below is valid for the thermal impedance specified in the thermal information section on page 2. 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 0 20 40 60 80 100 120 140 allowable power dissipation [w] ambient temperature [ ] sop-8-pp to-252-5l
tj49 15 0 july 2 01 1 htc 11 r evision notice th e information in this datasheet can be revised without any notice to describe proper electrical characteristics.

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